Join Global Yield and experience the exciting transition of Intel technology development from Oregon to Intel High Volume Manufacturing Fabs.Global Yield is part of Fab Sort Manufacturing (FSM).
FSM is responsible for the production of Intel silicon using the world's most advanced manufacturing processes in fabs in Europe and Ireland.
As a key deliverable for IDM2.0 strategy, Global Yield was formed to drive continuous process technology development within FSM; in support of yield improvement, MOR changes, and Foundry Customer optimizations.
This job requisition is to seek BEOL (Back-End-Of-Line) Process Integration engineering roles in FSM HVM Global Yield organization, reporting to BEOL Process Integration manager.
Selected candidates will work with other members in BEOL integration, other teams in Global Yield org, fab module, yield, and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers.
Responsibilities will include but are not limited to:
Provides sustaining support of module equipment/ module components and supports installation and qualification of new module equipment/ module components.
Own engineering projects to execute HVM yield roadmap, device targeting, focusing on Cu BEOL integration.
Collaborate with BEOL Technology Development team to import new technology to production fabs.
Work with FEOL/BEOL Integration, Device, Defect Reduction and Yield Analysis team members to identify root cause of yield/performance issues and implement mitigation plan in defined timeline to meet committed production yield/performance targets and to support fast paced yield ramp-up in high-volume manufacturing phases.
Own engineering projects to improve product yield, quality, performance and to reduce wafer cost.
Engineering support for technical interactions with internal and external customers.
Candidate should possess the following behavioral skills:
Problem-solving technique with self-initiative and self-learning capabilities.
Comfortable working with a high degree of autonomy.
Capacity to work with multi-functional, multi-cultural teams.
Communication skills.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:
Preferred Qualifications:Experience in SADP/SAQP, advanced metallization, and/or immersion lithography/EUV).Advanced (Masters or PhD) degree in Electrical Engineering, Physics, Chemistry, Materials Science or in a STEM related Field.Experience in project/program management and/or Task Force Team lead.Experience in leveraging big data analysis to identify process design weaknesses and/or manufacturing weaknesses in order to propose corrective, data-based solutions.Experience with extracting insights from structured and unstructured data by quickly synthesizing large volumes of data and applying statistics and machine learning.Experience in new semiconductor technology development.Experience in serving external Foundry customers through technical interactions.Experience in latest lithography and metallization device architectures.Experience in Statistics and machine learning preferred.Previous related work experience in a semiconductor foundry preferred
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://jobs.intel.com/en/benefits
Annual Salary Range for jobs which could be performed in the US:
$179,900.00-$253,980.00Salary range dependent on a number of factors including location and experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.