Job Details:

Job Description: 

Design Technology Platform (DTP) organization is looking for talented individuals to work in join Test Chip Engineering team to execute Test Chip design. This position will provide an opportunity to understand how advanced Silicon technology nodes are developed from early pathfinding to maturity. Engineer will build targeted test structures through Physical design automation, collateral support and innovative solutions thru AI/ML methods. About the Role: - You will be part of the Design Execution in Test Chip Engineering team - The design execution and flow covers detailed physical design creation, verification and DRC LVS signoff. - Applying AI/ML and data analytics techniques to solve complex problems. #DesignEnablement #DesignTechnologyPlatform

Qualifications:

Open to Year 3 students with Bachelor or Master Degree in Electrical Engineering, Electronic Engineering, Electrical and Electronic Engineering, Microelectronic Engineering, Mechatronic Engineering, Computer Engineering, Computer Science or AI/ML. Additional qualifications include:- - CGPA : 3.70 and above - Knowledge of Computer System Architecture, Electronics, Microelectronics, or AI/ML - Knowledge in Unix, Python/C/TCL or other programming. - Highly motivated curious and a team player with keen interest in finding and resolving silicon failures #DesignEnablement #DesignTechnologyPlatform

Job Type:

Student / Intern

Shift:

Shift 1 (Malaysia)

Primary Location: 

Malaysia, Penang

Additional Locations:

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.