Job Details:

Job Description: 

The Foundational Security team (FST) is looking for digital logic designers and validators keen to work on a scalable IP design. Candidate will be responsible for design and validation of new IP roadmap features as part of FST's HW IP developing HW security for various market segments across Intel.As a member of the team, the candidate would be responsible for driving scalable IP development while also making the Design Integration and SOC delivery a fully automated solution. Candidate will be part of an IP team working closely with other verification engineers, RTL design engineers, micro-architects, and other team members in determining the proper implementation strategy for new design, ensure quality of design, and develop test-plans, verification environment, and drive delivery to SoC. They will have an opportunity to learn and contribute towards making Intel Hardware more secure.Excellent communication and organization skills are critical, along with teamwork, and must demonstrate strong technical skills, along with having passion for design or validation.Must have strong orientation for Quality and Commit and Deliver and Drive Innovation/efficiencies and have strong strategic thinking to come up w/ paradigm shift solutions to critical design/validation challenges.

Behavioral traits:

• Strong analysis.

• debugging skills.

• creative in problem solving.

Qualifications:

Minimum Qualifications,You must possess the below minimum qualifications to be initially considered for this position:

• Candidate must be pursuing a BS degree in Electronic, Electrical, Mechatronic engineer, computer science, or related STEM field.

• 6+ month experience in Very Large Scale Integration (VLSI).

• Willing to remain at least 1 year as an active student

• Willing to work at least 30 hours per week

• Intermediate to advanced English Level.

• Costa Rican unrestricted work permit.

Preferred Qualifications,Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates:

• Knowledge in any of the next areas is a plus:

• System Verilog / OOP, OVM/UVM.

• IP-level design and/or verification.

• SOC-level design/integration and/or validation.

• RTL quality checks.

• Simulation-based debug (VCS, Verdi, DVE).

• Computer (CPU) and/or System (Platform) Architecture.

• Emulation at SoC and/or Platform level.

• Firmware and/or boot development/debug.

• Python programming.

• Front-end Design TFMs (Tools, Flows, and Methodologies).

Relevant experience can be obtained through schoolwork, classes and project work, internships, and/or work experience.

Job Type:

Student / Intern

Shift:

Shift 1 (Costa Rica)

Primary Location: 

Costa Rica, San Jose

Additional Locations:

Business group:

The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.